1. Field of the Invention
The invention relates to a method of fabricating a semiconductor device, and more particularly to such a method including the step of reducing a copper oxide formed on a copper wiring layer.
2. Description of the Related Art
As a semiconductor device has been fabricated in a smaller size and in higher integration, a copper wiring layer has been used in place of an aluminum wiring layer in order to enhance a resistance of a metal wiring layer to electro-migration.
Since copper does not make a halogen compound having a high vapor pressure, it was quite difficult or almost impossible to form a copper wiring layer by dry etching. It has recently become possible to form a copper wiring layer by means of a damascene structure where copper is polished by chemical mechanical polishing (CMP).
However, copper has shortcomings that it is likely to be oxidized at a relatively low temperature, and that it is likely to spread in an insulating film such as a silicon dioxide film.
In order to overcome those shortcomings, U.S. Pat. No. 5,744,376 has suggested a method of fabricating a semiconductor device in which a copper wiring layer is surrounded by two different barrier layers.
In the suggested method, a first barrier layer composed of tantalum or tantalum nitride is formed between a copper wiring layer and a first insulating film formed just below the copper wiring layer. Then, extra copper and the first barrier layer are removed by CMP. Then, a second barrier layer composed of silicon nitride is formed on both the copper wiring layer and the first insulating film. Thereafter, a second insulating film composed of silicon dioxide is formed on the second barrier layer. In this method, the silicon nitride film or the second barrier layer is used as a cap film for preventing the copper wiring layer from being oxidized.
The suggested method is characterized in that a lower layer, that is, the first barrier layer is an electrically conductive film, whereas an upper layer, that is, the second barrier layer is an insulating film.
In this method, the first barrier layer prevents copper from spreading into the underlying insulating film, and the second barrier layer prevents copper from being oxidized when a via-hole is formed.
The via-hole is formed by dry etching to reach the second barrier layer. Then, a resist is removed by oxygen ashing.
Then, the second barrier layer is etched with the second insulating film being used as a mask until the copper wiring layer appears. The second barrier layer prevents the copper wiring layer from being directly exposed to oxygen plasma during oxygen ashing, ensuring that the copper wiring layer is not oxidized.
U.S. Pat. No. 5,447,887 has suggested a method of fabricating a semiconductor device, including the step of forming an intermediate layer composed of copper silicide in order to enhance adhesion between a copper wiring layer and a silicon nitride film formed on the copper wiring layer.
Since a silicon nitride film formed by plasma-enhanced CVD has poor adhesion with copper, when an insulating film is formed on a silicon nitride film, the silicon nitride film often peels off a copper wiring layer.
In order to solve this problem, a copper silicide (Cu.sub.3 Si) layer having a thickness of about 10 to 100 angstroms is formed on the copper wiring layer before forming the silicon nitride film. The copper silicide layer enhances adhesion between the copper wiring layer and the silicon nitride film.
The above-mentioned methods have problems as follows.
The first problem is that, in U.S. Pat. No. 5,744,376, since a copper oxide (CuxO) exists between the copper wiring layer and the silicon nitride film, the silicon nitride film is likely to peel off the copper wiring layer. In particular, the silicon nitride film is likely to peel off a copper wiring layer having a large area.
In addition, copper atoms can readily move at an interface because of poor adhesion, electro-migration is deteriorated.
This is because a copper oxide (CuxO) is produced at a surface of the copper wiring layer at the step of CMP or cleaning, or by leaving the copper wiring layer in atmosphere. A thicker copper oxide film is formed when the copper wiring layer is left in atmosphere for a longer period of time.
This is also because that the silicon nitride film cannot remove a copper oxide before it grows up.
The above-mentioned first problem remains unsolved in U.S. Pat. No. 5,447,887.
This is because if a copper oxide exists at a surface of the copper wiring layer, copper silicide cannot be sufficiently formed in silicidation.
Even if copper silicide is formed, oxygen existing in the form of a copper oxide decomposes copper silicide into silicon dioxide and copper, when a subsequent heat treatment is carried out. As a result, the copper silicide layer would have a reduced thickness relative to an original thickness, and hence, adhesion is deteriorated.
The second problem is that it is not possible to have a sufficiently low via-hole resistance.
This is because that a copper oxide exists on a copper wiring layer, and that a copper oxide is produced at a bottom of a via-hole, that is, on a surface of a copper wiring layer when the via-hole is formed.
In U.S. Pat. No. 5,744,376, since the silicon nitride film is etched with the second insulating film composed of silicon dioxide, oxygen is separated from etching species, and the thus separated oxygen oxidizes copper.
In addition, a copper oxide is formed at a bottom of a via-hole, when the copper layer is left in atmosphere. Existence of the copper oxide at an interface raises a via-hole resistance.
Physical sputtering such as argon sputtering etching may be carried out for removing the above-mentioned copper oxide. However, the physical sputtering would exert harmful influence on reliability of a device. This is the third problem.
The reason is as follows. Since copper atoms are also sputtered in physical sputtering, copper atoms are scattered to an insulating film at the stage before the silicon nitride film is formed, and scattered to a sidewall of a via-hole when a copper oxide formed at a bottom of a via-hole is removed. As a result, copper spreads in the insulating film composed of silicon dioxide. Such spread of copper exerts a harmful influence on reliability of a device.
In addition, it would be quite difficult or almost impossible to remove a copper oxide formed at a bottom of a via-hole by conventional sputtering etching, if a via-hole and a contact hole had a high aspect ratio.
Japanese Unexamined Patent Publication No. 4-192527 has suggested a semiconductor device including a layer composed of copper alloy between a copper wiring layer and a protection insulating layer.
Japanese Unexamined Patent Publication No. 5-218035 has suggested a method of fabricating a semiconductor device, including the step of forming a RuO.sub.2 film as a barrier metal for a copper wiring layer, below the copper wiring layer by sputtering or CVD.
Japanese Unexamined Patent Publication No. 11-111842 has suggested a multi-layered structure including a lower wiring layer composed mainly of copper, and a plug composed of aluminum. The lower wiring layer is comprised of a lower barrier film, a copper film, an upper barrier film, and a electrically conductive adhesive thin layer.
However, the above-mentioned problems remain unsolved even in those Publications.